## intel io intel io — Register access and sideband I/O libraray |

## Functions

void | intel_mmio_use_pci_bar ()
void | intel_mmio_use_dump_file ()
int | intel_register_access_init ()
void | intel_register_access_fini ()
uint32_t | intel_register_read ()
void | intel_register_write ()
int | intel_register_access_needs_fakewake ()
uint32_t | INREG ()
void | OUTREG ()
uint32_t | intel_dpio_reg_read ()
void | intel_dpio_reg_write ()
uint32_t | intel_flisdsi_reg_read ()
void | intel_flisdsi_reg_write ()
uint32_t | intel_iosf_sb_read ()
void | intel_iosf_sb_write ()
int | intel_punit_read ()
int | intel_punit_write ()
int | intel_nc_read ()
int | intel_nc_write ()

## Types and Values

extern void * | mmio

## Includes

    #include <intel_io.h>

## Description

This library provides register I/O helpers in both a basic version and a more fancy version which also handles forcewake and can optionally check registers against a white-list. All register function are compatible. Hence the same code can be used to decode registers with either of them, or also from a dump file using `intel_mmio_use_dump_file()`.

Furthermore this library also provides helper functions for accessing the various sideband interfaces found on Valleyview/Baytrail based platforms.

## Functions

### intel_mmio_use_pci_bar ()

    void
    intel_mmio_use_pci_bar (struct pci_device *pci_dev);

Sets up mmio to point at the data contained in `file` . This allows the same code to get reused for dumping and decoding from running hardware as from register dumps.

`pci_dev` can be obtained from `intel_get_pci_device()`.

#### Parameters

pci_dev | intel gracphis pci device |

### intel_mmio_use_dump_file ()

    void
    intel_mmio_use_dump_file (char *file);

Sets up mmio to point at the data contained in `file` . This allows the same code to get reused for dumping and decoding from running hardware as from register dumps.

#### Parameters

file | name of the register dump file to open |

### intel_register_access_init ()

    int
    intel_register_access_init (struct pci_device *pci_dev,
                                int safe);

This initializes the new register access library, which supports forcewake handling and also allows register access to be checked with an explicit whitelist.

It also initializes mmio like `intel_mmio_use_pci_bar()`.

`pci_dev` can be obtained from `intel_get_pci_device()`.

#### Parameters

pci_dev | intel gracphis pci device |
safe | use safe register access tables |

### intel_register_access_fini ()

    void
    intel_register_access_fini (void);

Clean up the register access helper initialized with `intel_register_access_init()`.

### intel_register_read ()

    uint32_t
    intel_register_read (uint32_t reg);

32-bit read of the register at `offset` . This function only works when the new register access helper is initialized with `intel_register_access_init()`.

Compared to `INREG()` it can do optional checking with the register access white lists.

#### Parameters

reg | register offset |

#### Returns

The value read from the register.

### intel_register_write ()

    void
    intel_register_write (uint32_t reg,
                          uint32_t val);

32-bit write to the register at `offset` . This function only works when the new register access helper is initialized with `intel_register_access_init()`.

Compared to `OUTRET()` it can do optional checking with the register access white lists.

#### Parameters

reg | register offset |
val | value to write |

### intel_register_access_needs_fakewake ()

    int
    intel_register_access_needs_fakewake (void);

#### Returns

Non-zero when forcewake initialization failed.

### INREG ()

    uint32_t
    INREG (uint32_t reg);

32-bit read of the register at `offset` . This function only works when the new register access helper is initialized with `intel_register_access_init()`.

This function directly accesses the mmio without safety checks.

#### Parameters

reg | register offset |

#### Returns

The value read from the register.

### OUTREG ()

    void
    OUTREG (uint32_t reg,
            uint32_t val);

### intel_dpio_reg_read ()

    uint32_t
    intel_dpio_reg_read (uint32_t reg,
                         int phy);

32-bit read of the register at `offset` through the DPIO sideband port.

#### Parameters

reg | register offset |
phy | DPIO PHY to use |

#### Returns

The value read from the register.

### intel_dpio_reg_write ()

    void
    intel_dpio_reg_write (uint32_t reg,
                          uint32_t val,
                          int phy);

32-bit write of the register at `offset` through the DPIO sideband port.

#### Parameters

reg | register offset |
val | value to write |
phy | dpio PHY to use |

### intel_flisdsi_reg_read ()

    uint32_t
    intel_flisdsi_reg_read (uint32_t reg);

### intel_flisdsi_reg_write ()

    void
    intel_flisdsi_reg_write (uint32_t reg,
                             uint32_t val);

### intel_iosf_sb_read ()

    uint32_t
    intel_iosf_sb_read (uint32_t port,
                        uint32_t reg);

### intel_iosf_sb_write ()

    void
    intel_iosf_sb_write (uint32_t port,
                         uint32_t reg,
                         uint32_t val);

### intel_punit_read ()

    int
    intel_punit_read (uint8_t addr,
                      uint32_t *val);

32-bit read of the register at `offset` through the P-Unit sideband port.

#### Parameters

addr | register offset |
val | pointer to starge for the read result |

#### Returns

0 when the register access succeeded, negative errno code on failure.

### intel_punit_write ()

    int
    intel_punit_write (uint8_t addr,
                       uint32_t val);

32-bit write of the register at `offset` through the P-Unit sideband port.

#### Parameters

addr | register offset |
val | value to write |

#### Returns

0 when the register access succeeded, negative errno code on failure.

### intel_nc_read ()

    int
    intel_nc_read (uint8_t addr,
                   uint32_t *val);

32-bit read of the register at `offset` through the NC sideband port.

#### Parameters

addr | register offset |
val | pointer to starge for the read result |

#### Returns

0 when the register access succeeded, negative errno code on failure.

### intel_nc_write ()

    int
    intel_nc_write (uint8_t addr,
                    uint32_t val);

32-bit write of the register at `offset` through the NC sideband port.

#### Parameters

addr | register offset |
val | value to write |

#### Returns

0 when the register access succeeded, negative errno code on failure.

## Types and Values

### mmio

    extern void *mmio;

Pointer to the register range. It is not recommended to use this directly.